added tests for SC_SHUTDOWN and SC_WRITE (print)

This commit is contained in:
Samy Solhi 2023-04-03 23:08:13 +02:00
parent 5c7979b746
commit 655bf9eab7
2 changed files with 54 additions and 6 deletions

View File

@ -78,10 +78,7 @@ fn syscall(machine: &Machine) -> Result<MachineOk, MachineError> {
// load buffer // load buffer
let mut buffer = "".to_string(); let mut buffer = "".to_string();
for i in 0..size { for i in 0..size {
match char::from_digit(machine.read_memory(1, (address + i) as usize) as u32, 2) { buffer.push((machine.read_memory(1, (address + i) as usize)) as u8 as char);
Some(c) => buffer.push(c),
None => todo!() // Throw a proper error
}
} }
if f as u8 == CONSOLE_OUTPUT { if f as u8 == CONSOLE_OUTPUT {
@ -122,3 +119,54 @@ fn syscall(machine: &Machine) -> Result<MachineOk, MachineError> {
_ => todo!() _ => todo!()
} }
} }
#[cfg(test)]
mod test {
use crate::kernel::exception::{SC_SHUTDOWN, SC_WRITE};
use crate::simulator::instruction::Instruction;
use crate::simulator::machine::Machine;
#[test]
fn test_sc_shutdown() {
let mut machine = Machine::init_machine();
machine.write_int_register(17, SC_SHUTDOWN as i64); // Set type to shutdown
let ecall = Instruction::new(0b000000000000_00000_000_00000_1110011);
machine.write_memory(4, 0, 0b000000000000_00000_000_00000_1110011); // ecall
machine.write_memory(4, 4, 0b000000001010_00000_000_00001_0010011); // r1 <- 10
machine.run();
// If the machine was stopped with no error, the shutdown worked
assert_ne!(machine.read_int_register(1), 10); // Check if the next instruction was executed
}
// This test print HELLO in the console
#[test]
#[ignore]
fn test_sc_print() {
let mut machine = Machine::init_machine();
let address = machine.read_int_register(10);
// Write string 'HELLO' in memory
machine.write_memory(1, 4000, 72);
machine.write_memory(1, 4001, 69);
machine.write_memory(1, 4002, 76);
machine.write_memory(1, 4003, 76);
machine.write_memory(1, 4004, 79);
machine.write_int_register(10, 4000); // String address
machine.write_int_register(11, 5); // String size
machine.write_int_register(12, 1); // Console output
machine.write_memory(4, 0, 0b000000000000_00000_000_00000_1110011); // ecall
machine.write_int_register(17, SC_WRITE as i64); // Set type to write
machine.write_memory(4, 4, 0b000000000000_00000_000_10001_0010011); // r17 <- SC_SHUTDOWN
machine.write_memory(4, 8, 0b000000000000_00000_000_00000_1110011); // ecall
machine.run();
}
}

View File

@ -298,7 +298,7 @@ impl Machine {
RISCV_JAL => { RISCV_JAL => {
self.int_reg.set_reg(inst.rd, self.pc as i64); self.int_reg.set_reg(inst.rd, self.pc as i64);
self.pc = (self.pc as i64 + inst.imm21_1_signed as i64 - 4) as u64; self.pc = (self.pc as i64 + inst.imm21_1_signed as i64 - 4) as u64;
Ok((MachineOk::Ok)) Ok(MachineOk::Ok)
}, },
// Treatment for: JUMP AND LINK REGISTER INSTRUCTIONS (indirect jump) // Treatment for: JUMP AND LINK REGISTER INSTRUCTIONS (indirect jump)
@ -306,7 +306,7 @@ impl Machine {
let tmp = self.pc; let tmp = self.pc;
self.pc = (self.int_reg.get_reg(inst.rs1) + inst.imm12_I_signed as i64) as u64 & 0xfffffffe; self.pc = (self.int_reg.get_reg(inst.rs1) + inst.imm12_I_signed as i64) as u64 & 0xfffffffe;
self.int_reg.set_reg(inst.rd, tmp as i64); self.int_reg.set_reg(inst.rd, tmp as i64);
Ok((MachineOk::Ok)) Ok(MachineOk::Ok)
}, },
// Treatment for: BRANCH INSTRUCTIONS // Treatment for: BRANCH INSTRUCTIONS