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added tests for SC_SHUTDOWN and SC_WRITE (print)

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This commit is contained in:
Samy Solhi
2023-04-03 23:08:13 +02:00
parent 5c7979b746
commit 655bf9eab7
2 changed files with 54 additions and 6 deletions
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4
src/simulator/machine.rs
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@ -298,7 +298,7 @@ impl Machine {
RISCV_JAL => {
self.int_reg.set_reg(inst.rd, self.pc as i64);
self.pc = (self.pc as i64 + inst.imm21_1_signed as i64 - 4) as u64;
Ok((MachineOk::Ok))
Ok(MachineOk::Ok)
},
// Treatment for: JUMP AND LINK REGISTER INSTRUCTIONS (indirect jump)
@ -306,7 +306,7 @@ impl Machine {
let tmp = self.pc;
self.pc = (self.int_reg.get_reg(inst.rs1) + inst.imm12_I_signed as i64) as u64 & 0xfffffffe;
self.int_reg.set_reg(inst.rd, tmp as i64);
Ok((MachineOk::Ok))
Ok(MachineOk::Ok)
},
// Treatment for: BRANCH INSTRUCTIONS