diff --git a/src/simulator/mem_cmp.rs b/src/simulator/mem_cmp.rs index 3e2ccd6..c8436a3 100644 --- a/src/simulator/mem_cmp.rs +++ b/src/simulator/mem_cmp.rs @@ -94,7 +94,10 @@ impl Mem_Checker{ pub fn from(path: &String) -> Mem_Checker { let file = fs::File::open("test_file_section.txt").expect("Wrong filename"); - let reader = io::BufReader::new(file); + let reader = io::BufReader::new(&file); + let reader2 = io::BufReader::new(&file); + let lines = reader.lines(); + let length = reader2.lines().count(); let mut pc: usize = 0; let mut sp: usize = 0; @@ -103,15 +106,15 @@ impl Mem_Checker{ let mut tmp_addr_str: String = String::new(); let mut tmp_len_str: String = String::new(); - for (i,line) in reader.lines().enumerate() { + for (i,line) in lines.enumerate() { let current_line = line.unwrap(); - if i == current_line.len()-2 { + if i == length-2 { //Lecture de PC pc = string_hex_to_usize(¤t_line); } - else if i == current_line.len()-1 { + else if i == length-1 { //Lecture SP sp = string_hex_to_usize(¤t_line); } @@ -277,7 +280,6 @@ mod tests { } - #[test] fn test_enum_start_at_zero(){ let v = vec![1,2,3]; diff --git a/src/simulator/print.rs b/src/simulator/print.rs index 0567fef..4cf103b 100644 --- a/src/simulator/print.rs +++ b/src/simulator/print.rs @@ -142,79 +142,76 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64 let name: &str; match ins.funct7 { RISCV_FP_ADD => { - name = "fadd"; + format!("{}\t{}{}{}", "fadd", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_SUB => { - name = "fsub"; + format!("{}\t{}{}{}", "fsub.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_MUL => { - name = "fmul"; + format!("{}\t{}{}{}", "fmul.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_DIV => { - name = "fdiv"; + format!("{}\t{}{}{}", "fdiv.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_SQRT => { - name = "fsqrt"; + format!("{}\t{}{}", "fsqrt.s", REG_F[rd], REG_F[rs1]) }, RISCV_FP_FSGN => { - match ins.funct3 { RISCV_FP_FSGN_J => { - name = "fsgnj"; + format!("{}\t{}{}{}", "fsgnj.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_FSGN_JN => { - name = "fsgnn"; + format!("{}\t{}{}{}", "fsgnn.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_FP_FSGN_JX => { - name = "fsgnx"; + format!("{}\t{}{}{}", "fsgnx.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) }, - _ => name = "fsgn" + _ => todo!("Unknown code") } }, RISCV_FP_MINMAX => { if ins.funct3 == 0 { - name = "fmin"; + format!("{}\t{}{}{}", "fmin.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) } else { - name = "fmax"; + format!("{}\t{}{}{}", "fmax.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) } }, RISCV_FP_FCVTW => { if rs2 == 0 { - name = "fcvt.w.s"; + format!("{}\t{}{}", "fcvt.w.s", REG_F[rd], REG_F[rs1]) } else { - name = "fcvt.wu.s"; + format!("{}\t{}{}", "fcvt.wu.s", REG_F[rd], REG_F[rs1]) } - }, RISCV_FP_FMVXFCLASS => { if ins.funct3 == 0 { - name = "fmv.x.w"; + format!("{}\t{}{}", "fmv.x.w", REG_F[rd], REG_F[rs1]) } else { - name = "fclass.s"; + format!("{}\t{}{}", "fclass.s", REG_F[rd], REG_F[rs1]) } }, RISCV_FP_FCMP => { if ins.funct3 == 0 { - name = "fle.s"; + format!("{}\t{}{}{}", "fle.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) } else if ins.funct3 == 1 { - name = "flt.s"; + format!("{}\t{}{}{}", "flt.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) } else { - name = "feq.s"; + format!("{}\t{}{}{}", "feq.s", REG_F[rd], REG_F[rs1], REG_F[rs2]) } }, RISCV_FP_FCVTS => { if rs2 == 0 { - name = "fcvt.s.w" + format!("{}\t{}{}", "fcvt.s.w", REG_F[rd], REG_F[rs1]) } else { - name = "fcvt.s.wu" + format!("{}\t{}{}", "fcvt.s.wu", REG_F[rd], REG_F[rs1]) } }, RISCV_FP_FMVW => { - name = "fmv.w.x"; + format!("{}\t{}{}", "fmv.w.x", REG_F[rd], REG_F[rs1]) }, - _ => name = "todo" + _ => todo!("Unknown code") } - format!("{}\t{}{}{}", name, REG_F[rd], REG_F[rs1], REG_F[rs2]) }, RISCV_SYSTEM => { diff --git a/test_file_section.txt b/test_file_section.txt index 05d3ead..df1b0d2 100644 --- a/test_file_section.txt +++ b/test_file_section.txt @@ -1,8 +1,15 @@ -0 -0 -FF FF -F4A12200 -A0 0A -01022B -0B 0F -FFACBC5CEF +addi sp,sp,-32 +sd s0,24(sp) +addi s0,sp,32 +sw zero,-20(s0) +li a5,1 +sw a5,-24(s0) +lw a5,-20(s0) +mv a4,a5 +lw a5,-24(s0) +addw a5,a4,a5 +sw a5,-20(s0) +nop +ld s0,24(sp) +addi sp,sp,32 +ret \ No newline at end of file diff --git a/test_programs/riscv_instructions/simple_arithmerics/unsigned_addition.o b/test_programs/riscv_instructions/simple_arithmerics/unsigned_addition.o new file mode 100644 index 0000000..3d69445 Binary files /dev/null and b/test_programs/riscv_instructions/simple_arithmerics/unsigned_addition.o differ