From 3685bb6590ea084a8b2467ef26772a5451bcf5ee Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fran=C3=A7ois=20Autin?= Date: Wed, 5 Apr 2023 13:41:56 +0200 Subject: [PATCH] Added general failure case in raise exception and removed break in main loop for system exceptions --- src/simulator/machine.rs | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/simulator/machine.rs b/src/simulator/machine.rs index 123b43b..9baf651 100644 --- a/src/simulator/machine.rs +++ b/src/simulator/machine.rs @@ -227,7 +227,6 @@ impl Machine { } pub fn raise_exception(&mut self, exception: ExceptionType, address : u64, system: &mut System) -> Result{ - self.set_status(MachineStatus::SystemMode); // Handle the interruption match exception::call(exception, self, system) { @@ -235,7 +234,7 @@ impl Machine { self.set_status(MachineStatus::UserMode); return Ok(MachineOk::Shutdown); } - _ => () + _ => Err(format!("Syscall {:?} invalid or not implemented", exception))? } // todo: return error if the syscall code is invalid self.set_status(MachineStatus::UserMode); Ok(MachineOk::Ok) @@ -251,7 +250,7 @@ impl Machine { match self.one_instruction(system) { Ok(MachineOk::Ok) => println!("hello"), Ok(MachineOk::Shutdown) => break, - Err(e) => { if e.to_string().contains("System") { break; } panic!("FATAL at pc {} -> {}", self.pc, e) } + Err(e) => panic!("FATAL at pc {} -> {}", self.pc, e) } self.write_int_register(0, 0); // In case an instruction write on register 0 }