diff --git a/src/simulator/print.rs b/src/simulator/print.rs
index ea8cd2a..68a8b89 100644
--- a/src/simulator/print.rs
+++ b/src/simulator/print.rs
@@ -74,11 +74,7 @@ pub fn print(ins: Instruction, pc: i32) -> String { //TODO pc should be u64
             format!("auipc\t{}, {:X}", REG_X[rd], ins.imm31_12)
         },
         RISCV_JAL => {
-            if ins.rd == 0 {
-                format!("j\t{}", ins.imm31_12)
-            } else {
-                format!("jal\t{}, {:X}", REG_X[rd], (pc - 4 + ins.imm21_1_signed)) 
-            }
+            format!("jal\t{},{:X}", REG_X[rd], (pc + ins.imm21_1_signed)) 
         },
         RISCV_JALR => {
             format!("jalr\t{},{}({})", REG_X[rd], ins.imm12_I_signed, REG_X[rs1])
@@ -263,7 +259,7 @@ mod test {
         assert_eq!("lw	a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));          	
         assert_eq!("addi	a4,a5,0", print::print(decode::decode(0x00078713), 0));          	
         assert_eq!("lw	a5,-24(s0)", print::print(decode::decode(0xfe842783), 0));          	
-        //assert_eq!("mulw	a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));          	
+        //Waiting for mulw implementation assert_eq!("mulw	a5,a4,a5", print::print(decode::decode(0x02f707bb), 0));          	
         assert_eq!("sw	a5,-20(s0)", print::print(decode::decode(0xfef42623), 0));          	
         assert_eq!("lw	a5,-20(s0)", print::print(decode::decode(0xfec42783), 0));          	
         assert_eq!("addi	a4,a5,0", print::print(decode::decode(0x00078713), 0));          	
@@ -283,4 +279,11 @@ mod test {
 
     }
 
+
+    #[test]
+    fn test_fibo() {
+        assert_eq!("jal	zero,10504", print::print(decode::decode(0x0500006f), 0x104b4));
+        //assert_eq!("blt	a4,a5,104b8", print::print(decode::decode(0xfaf740e3), 0x10518));
+    }
+
 }
\ No newline at end of file